Free Contents for Teaching PLC Programming

Ladder (LD) is a visual programming language defined by the IEC 61131 standard. It includes components: Function AND - (X . Y) : |---------| |----| |---------| X Y Function OR - (X + Y) : |------|---| |--|------------| | X | |---| |--| Y Logical function - F=(X.Z + /Y) : |---|---| |---| |---|----( )-| | X Z | F |---|/|---------| Y ...

PLC3000 does not include Rising and Falling Edge functions. However, they can easily be generated from the available memory bits Generation in ST Generate a Rising Edge on %I0 is done by considering a memory bit, e.g. %M1, such as <img width="300" height="130" src="https://plc3000.com/wp-content/uploads/2021/05/FrontMontant-300x130.jpg" alt="" loading="lazy" srcset="https://i1.wp.com/plc3000.com/wp-content/uploads/2021/05/FrontMontant.jpg?resize=300%2C130&ssl=1 300w, https://i1.wp.com/plc3000.com/wp-content/uploads/2021/05/FrontMontant.jpg?w=533&ssl=1 533w" sizes="(max-width: 300px) 100vw, 300px" /> <pre> PROGRAM EDGE_R %M1 := %I0 AND NOT %M0; %M0 := %I0; END_PROGRAM
Generate a Falling Edge on %I1 is done by considering a memory bit, e.g. %M3

PROGRAM EDGE_F %M3 := NOT %I1 AND NOT %M2; %M2 := NOT %I1; END_PROGRAM ...

The IEC 61131 standard offers a definition of Counters. PLC3000 integrates up and down Counters. It is necessary to define a preselection value %Ci.PV, which can be set with an integer value. The current value of a counter is set to 0 when %Ci.R is activated. The current value of a counter is set to the preselection value %Ci.PV, when %Ci.LD is activated. The current value of a counter is incremented each time the %Ci.CU input is activated, and decremented each time the %Ci.CD input is activated. A counter has two outputs; %Ci.QU goes to 1 when the current counter ...

The IEC 61131 standart offers a definition of Timers. PLC3000 integrates only TON timers that can be set by defining the time base %Ti.TB, and the preset value %Ti.PV. The timer is triggered by activating the input %Ti.IN, and the output %Ti.Q goes to 1 when the current timer value reaches the preset value.The time bases %Ti.TB that can be declared are: 10, 100 ms; 1, 10 s; 1 min.Generation in STLet’s considering 3 timers with different time bases and preset valuesIF %S1 THEN %T0.TB := 100ms; %T1.TB := 1s; %T2.TB := 1min; %T0.PV := 3 ; %T1.PV := 2; ...

The IEC 61131 standard offers a definition of Counters. PLC3000 integrates up and down Counters. It is necessary to define a preselection value %Ci.PV, which can be set with an integer value. The current value of a counter is set to 0 when %Ci.R is activated. The current value of a counter is set to the preselection value %Ci.PV, when %Ci.LD is activated. The current value of a counter is incremented each time the %Ci.CU input is activated, and decremented each time the %Ci.CD input is activated.A counter has two outputs; %Ci.QU goes to 1 when the current counter value ...

The IEC 61131 standart offers a definition of Timers. PLC3000 integrates only TON timers that can be set by defining the time base %Ti.TB, and the preset value %Ti.PV. The timer is triggered by activating the input %Ti.IN, and the output %Ti.Q goes to 1 when the current timer value reaches the preset value.The time bases %Ti.TB that can be declared are: 10, 100 ms; 1, 10 s; 1 min.Generation in IL
Let’s consider three timers with different time bases and preset values LD %S1 %T0.TB := 100ms %T1.TB := 1s %T2.TB := 1min %T0.PV := 3 %T1.PV := 2 %T2.PV ...

PLC3000 does not include Rising and Falling Edge functions. However, they can easily be generated from the available memory bits Generation in IL Generate a Rising Edge on %I0 is done by considering a memory bit, e.g. %M1, such as <img width="300" height="130" src="https://plc3000.com/wp-content/uploads/2021/05/FrontMontant-300x130.jpg" alt="" loading="lazy" srcset="https://i1.wp.com/plc3000.com/wp-content/uploads/2021/05/FrontMontant.jpg?resize=300%2C130&ssl=1 300w, https://i1.wp.com/plc3000.com/wp-content/uploads/2021/05/FrontMontant.jpg?w=533&ssl=1 533w" sizes="(max-width: 300px) 100vw, 300px" /> <pre> LD %I0 ANDN %M0 ST %M1 LD %I0 ST %M0
Generate a Falling Edge on %I1 is done by considering a memory bit, e.g. %M3, such as

LDN %I1 ANDN %M2 ST %M3 LDN %I1 ST %M2 ...

1. Example in ST Let’s considering the logical equation: %M0 = %I0.%I1+%I2. /%I3 PROGRAM LogicalFunction %M0 := %I0 AND %I1 OR %I2 AND NOT %I3; END_PROGRAM 2. Example of Grafcet in ST Let’s considering the elementary Grafcet a. Programming Transition/Transition PROGRAM TrTr (* INIT *) IF %S2 THEN %M0 := TRUE; %M1 := FALSE; END_IF (* TRANSITIONS *) IF %M0 AND %I0 THEN %M1 := TRUE; %M0 := FALSE; END_IF IF %M1 AND %I1 THEN %M0 := TRUE; %M1 := FALSE; END_IF (* ACTIONS *) %Q0 := %M1; END_PROGRAM b. Programming Transition/Transition with Crossing bits PROGRAM TrTrB (* INIT *) ...

The programming language Structured Text (ST) is defined by the IEC 61131 standard. It includes the instructions: := ; --> Assignment := TRUE; --> Assignment to 1 := FALSE; --> Assignment to 0 PROGRAM ... END_PROGRAM IF ... THEN ... ELSE ... END_IF FOR ... END_FOR WHILE ... END_WHILE REPEAT ... UNTIL ... END_REPEAT Basic logic functions are: AND OR XOR: eXclusive OR and their complement are: AND NOT OR NOT XOR NOT : eXclusive AND Logic functions can be followed with parentheses: AND( OR( XOR( ) ) ) Comments can be added inside the symbols: (*…. *). The programming ...

c. Programming Step/Step
* START LD %M1 AND %I1 OR( %M0 ANDN %I0 ) OR %S2 S %M0 R %M1 * LD %M0 AND %I0 OR( %M1 ANDN %I1 ) S %M1 R %M0 * ACTIONS LD %M1 ST %Q0 d. Programming Step/Step with Crossing Bits * START LD %M1 AND %I1 OR( %M0 ANDN %I0 ) OR %S2 ST %M10 * LD %M0 AND %I0 OR( %M1 ANDN %I1 ) ST %M11 * CROSSING LD %M10 S %M0 R %M1 * LD %M11 S %M1 R %M0 * ACTIONS LD %M1 ST %Q0 b. Programming Transition/Transition with Crossing Bits
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