Free Contents for Teaching PLC Programming

Our mission is to help PLC Programming educators focus on their students and provide them with the best education. This is why we have made PLC3000. This is why we provide you with all free resources below.

Why are ST Language Loops Considered Harmful?

The Structured Text (ST) language is among the languages of the IEC 61131 standard supported by PLC3000. Compared to other languages like Instruction List (IL), ST supports expressions with a higher level of abstraction. It notably provides loop statements. However, the use of loops is generally considered a poor practice when programming programmable logic controllers (PLCs).The recommendation to avoid loops in industrial automation is based on the structure of PLCs and their functioning. A PLC has multiple inputs/outputs that are connected to a system to automate or supervise. Inputs reflect the state of sensors, buttons, or switches. Outputs control devices ...
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Loops – ST

The Structured Text (ST) language supports 3 kinds of loops:
  • FOR ... DO ... END_FOR: Reapeats some processing for some given iteration count
  • WHILE ... DO ... END_WHILE: Repeats some processing while a condition is true
  • REPEAT ... UNTIL ... END_REPEAT
    : Performs some processing at least once, then repeats it until some condition becomes true
Even if these instructions are defined as part of the IEC 61131 standard, their use is viewed as a bad practice and should be avoided. They extend the cycle time . They can even lead to infinite loops when inputs are used in condition expressions! A dedicated article discusses ...
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Principles of Sequential Logic

Sequential logic functions Sequential logic functions are time-dependent. They define the state of output variables according to the combination of input variables, and also by the memorised state of one or more variables. They are often synthesised by flip-flops. The interest of the sequential logic functions is demonstrated thanks to some examples. Basics of sequential logic functions The output %Q0 has to switch on when the button %I1 is pushed. It has to stay ON even if the button %I1 is released and until the button %I0 is pushed. It is supposed that pushing in the same time on %I0 ...
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Principles of Combinatorial Logic

Theory
Combinatorial logic is used as a basis for the design of functional programming languages. It responds to a theoretical model. The information is of binary type. It is represented by electrical signals with 2 states {0; 1}.A logical function defines the state of output variables according to the combination of input variables, without taking into account the time. The output states depend directly to the input variables. For different variables:• Input variables: signals from other systems or control elements, such as push buttons, switches, sensors, identified or known a priori.• Output variables: signals to activate or not the control of ...
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Automaton Properties

IEC 63111-1 compliant PLCs, such as the PLC3000 solution, are characterised by a cycle operation. A cycle is generally composed of 5 phases: 1. reading inputs, 2. scanning the program, 3. writing outputs, 4. communication services, 5. internal functions. The scanning of the program is always done from top to bottom and from left to right. This operation must be known, and can be used for the design of particular functions. Unique Output Declaration The sequence of the code lines is of crucial importance. By coding : %Q4 = %I14, %Q4 = %I15. By checking the behaviour, you will notice ...
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Edge generation in LD

PLC3000 with the Ladder langage allows the rising and falling Edges. Declaration in LD A rising Edge is defined during the variable declaration in the Ladder code editor. A rising Edge on input %I0: A falling Edge is defined during the variable declaration in the Ladder code editor. A falling Edge on input %I1 : ...
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Timer – LD

The IEC 61131 standart offers a definition of Timers. PLC3000 integrates only TON timers that can be set by defining the time base %Ti.TB, and the preset value %Ti.PV. The timer is triggered by activating the input %Ti.IN, and the output %Ti.Q goes to 1 when the current timer value reaches the preset value.The time bases %Ti.TB that can be declared are: 10, 100 ms; 1, 10 s; 1 min.Generation in LDA Timer, its preset value and time base are defined during the variable creation with the Ladder code editor. For example, the Timer %T0 with a preset value %T0.PV=5 ...
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Mnemonics in the LD Language

At each variable can be associated a mnemonic. It is then possible to
use the mnemonic or variable completely transparently in programs.To associate the variable Switch to the input %I0, the variables RedLight and GreenLight to the outputs %Q0 and %Q1 respectively, it is possible to specify them during the variable declaration in the Ladder editor: In the Ladder code Editor, the variables appear: ...
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Counter LD

The IEC 61131 standard offers a definition of Counters. PLC3000 integrates up and down Counters. It is necessary to define a preset value %Ci.PV, which can be set with an integer value. The current value of a counter is set to 0 when %Ci.R is activated. The current value of a counter is set to the preset value %Ci.PV, when %Ci.LD is activated. The current value of a counter is incremented each time the %Ci.CU input is activated, and decremented each time the %Ci.CD input is activated. A counter has two outputs; %Ci.QU goes to 1 when the current counter ...
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Programming in LD

1. Example in ST Let’s considering the logical equation: %M0 = %I0.%I1+%I2. /%I3 2. Example of Grafcet in ST Let’s considering the elementary Grafcet a. Programming Transition/Transition Initialization Test on Receptivity and Transition Crossing Output declaration
b. Programming Transition/Transition with Crossing bits Initialization Test on Receptivity Transition Crossing Output declaration c. Programming Step/Step d. Programming Step/Step with Crossing Bits Step Equations with Crossing Bits Step Activation
Output Declaration
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